2021-07-15 22:42:55 +02:00
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# Copyright (c) 2019 The Bitcoin Core developers
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# Distributed under the MIT software license, see the accompanying
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# file COPYING or http://www.opensource.org/licenses/mit-license.php.
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LIBCRC32C_INT = crc32c/libcrc32c.a
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LIBLEVELDB_SSE42_INT = leveldb/libleveldb_sse42.a
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EXTRA_LIBRARIES += $(LIBCRC32C_INT)
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LIBCRC32C = $(LIBCRC32C_INT)
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CRC32C_CPPFLAGS_INT =
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CRC32C_CPPFLAGS_INT += -I$(srcdir)/crc32c/include
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CRC32C_CPPFLAGS_INT += -DHAVE_BUILTIN_PREFETCH=@HAVE_BUILTIN_PREFETCH@
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CRC32C_CPPFLAGS_INT += -DHAVE_MM_PREFETCH=@HAVE_MM_PREFETCH@
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CRC32C_CPPFLAGS_INT += -DHAVE_STRONG_GETAUXVAL=@HAVE_STRONG_GETAUXVAL@
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CRC32C_CPPFLAGS_INT += -DHAVE_WEAK_GETAUXVAL=@HAVE_WEAK_GETAUXVAL@
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CRC32C_CPPFLAGS_INT += -DCRC32C_TESTS_BUILT_WITH_GLOG=0
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if ENABLE_SSE42
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CRC32C_CPPFLAGS_INT += -DHAVE_SSE42=1
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else
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CRC32C_CPPFLAGS_INT += -DHAVE_SSE42=0
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endif
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if ENABLE_ARM_CRC
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CRC32C_CPPFLAGS_INT += -DHAVE_ARM64_CRC32C=1
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else
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CRC32C_CPPFLAGS_INT += -DHAVE_ARM64_CRC32C=0
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endif
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if WORDS_BIGENDIAN
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CRC32C_CPPFLAGS_INT += -DBYTE_ORDER_BIG_ENDIAN=1
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else
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CRC32C_CPPFLAGS_INT += -DBYTE_ORDER_BIG_ENDIAN=0
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endif
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crc32c_libcrc32c_a_CPPFLAGS = $(AM_CPPFLAGS) $(CRC32C_CPPFLAGS_INT) $(CRC32C_CPPFLAGS)
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crc32c_libcrc32c_a_CXXFLAGS = $(AM_CXXFLAGS) $(PIE_FLAGS)
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crc32c_libcrc32c_a_SOURCES =
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crc32c_libcrc32c_a_SOURCES += crc32c/include/crc32c/crc32c.h
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crc32c_libcrc32c_a_SOURCES += crc32c/src/crc32c_arm64.h
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2020-12-09 21:37:13 +01:00
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crc32c_libcrc32c_a_SOURCES += crc32c/src/crc32c_arm64_check.h
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2021-07-15 22:42:55 +02:00
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crc32c_libcrc32c_a_SOURCES += crc32c/src/crc32c_internal.h
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crc32c_libcrc32c_a_SOURCES += crc32c/src/crc32c_prefetch.h
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crc32c_libcrc32c_a_SOURCES += crc32c/src/crc32c_read_le.h
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crc32c_libcrc32c_a_SOURCES += crc32c/src/crc32c_round_up.h
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crc32c_libcrc32c_a_SOURCES += crc32c/src/crc32c_sse42_check.h
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crc32c_libcrc32c_a_SOURCES += crc32c/src/crc32c_sse42.h
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crc32c_libcrc32c_a_SOURCES += crc32c/src/crc32c.cc
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crc32c_libcrc32c_a_SOURCES += crc32c/src/crc32c_portable.cc
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if ENABLE_SSE42
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LIBCRC32C_SSE42_INT = crc32c/libcrc32c_sse42.a
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EXTRA_LIBRARIES += $(LIBCRC32C_SSE42_INT)
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LIBCRC32C += $(LIBCRC32C_SSE42_INT)
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crc32c_libcrc32c_sse42_a_CPPFLAGS = $(crc32c_libcrc32c_a_CPPFLAGS)
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crc32c_libcrc32c_sse42_a_CXXFLAGS = $(crc32c_libcrc32c_a_CXXFLAGS) $(SSE42_CXXFLAGS)
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crc32c_libcrc32c_sse42_a_SOURCES = crc32c/src/crc32c_sse42.cc
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endif
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if ENABLE_ARM_CRC
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LIBCRC32C_ARM_CRC_INT = crc32c/libcrc32c_arm_crc.a
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EXTRA_LIBRARIES += $(LIBCRC32C_ARM_CRC_INT)
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LIBCRC32C += $(LIBCRC32C_ARM_CRC_INT)
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crc32c_libcrc32c_arm_crc_a_CPPFLAGS = $(crc32c_libcrc32c_a_CPPFLAGS)
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crc32c_libcrc32c_arm_crc_a_CXXFLAGS = $(crc32c_libcrc32c_a_CXXFLAGS) $(ARM_CRC_CXXFLAGS)
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crc32c_libcrc32c_arm_crc_a_SOURCES = crc32c/src/crc32c_arm64.cc
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endif
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