From 59a125a5ad1ebd84c46a83d9c810f8a6b2836a53 Mon Sep 17 00:00:00 2001 From: Kittywhiskers Van Gogh <63189531+kwvg@users.noreply.github.com> Date: Wed, 14 Jun 2023 16:58:44 +0100 Subject: [PATCH] merge bitcoin#27897: use GCC 12.3.0 to build releases --- contrib/guix/guix-build | 3 +- contrib/guix/manifest.scm | 24 +++++++++----- contrib/guix/patches/vmov-alignment.patch | 38 +++++++++++++++++------ 3 files changed, 47 insertions(+), 18 deletions(-) diff --git a/contrib/guix/guix-build b/contrib/guix/guix-build index 415e97c57d..1fef7400f5 100755 --- a/contrib/guix/guix-build +++ b/contrib/guix/guix-build @@ -74,7 +74,8 @@ mkdir -p "$VERSION_BASE" ################ # Default to building for all supported HOSTs (overridable by environment) -export HOSTS="${HOSTS:-x86_64-linux-gnu arm-linux-gnueabihf aarch64-linux-gnu riscv64-linux-gnu powerpc64-linux-gnu powerpc64le-linux-gnu +# powerpc64le-linux-gnu currently disabled due non-determinism issues across build arches. +export HOSTS="${HOSTS:-x86_64-linux-gnu arm-linux-gnueabihf aarch64-linux-gnu riscv64-linux-gnu powerpc64-linux-gnu x86_64-w64-mingw32 x86_64-apple-darwin arm64-apple-darwin}" diff --git a/contrib/guix/manifest.scm b/contrib/guix/manifest.scm index b49b8f15b6..ca03dc0385 100644 --- a/contrib/guix/manifest.scm +++ b/contrib/guix/manifest.scm @@ -94,7 +94,7 @@ chain for " target " development.")) (home-page (package-home-page xgcc)) (license (package-license xgcc))))) -(define base-gcc gcc-10) +(define base-gcc gcc-12) (define base-linux-kernel-headers linux-libre-headers-6.1) (define* (make-bitcoin-cross-toolchain target @@ -565,9 +565,6 @@ inspecting signatures in Mach-O binaries.") automake pkg-config bison - ;; Native GCC 10 toolchain - gcc-toolchain-10 - (list gcc-toolchain-10 "static") ;; Scripting python-minimal ;; (3.10) ;; Git @@ -576,14 +573,25 @@ inspecting signatures in Mach-O binaries.") python-lief) (let ((target (getenv "HOST"))) (cond ((string-suffix? "-mingw32" target) - ;; Windows - (list zip + (list ;; Native GCC 12 toolchain + gcc-toolchain-12 + (list gcc-toolchain-12 "static") + zip (make-mingw-pthreads-cross-toolchain "x86_64-w64-mingw32") nsis-x86_64 nss-certs osslsigncode)) ((string-contains target "-linux-") - (list (make-bitcoin-cross-toolchain target))) + (list ;; Native GCC 12 toolchain + gcc-toolchain-12 + (list gcc-toolchain-12 "static") + (make-bitcoin-cross-toolchain target))) ((string-contains target "darwin") - (list clang-toolchain-10 binutils xorriso python-signapple)) + (list ;; Native GCC 10 toolchain + gcc-toolchain-10 + (list gcc-toolchain-10 "static") + binutils + clang-toolchain-10 + python-signapple + xorriso)) (else '()))))) diff --git a/contrib/guix/patches/vmov-alignment.patch b/contrib/guix/patches/vmov-alignment.patch index 7976b864af..96e1cb7cd1 100644 --- a/contrib/guix/patches/vmov-alignment.patch +++ b/contrib/guix/patches/vmov-alignment.patch @@ -168,14 +168,19 @@ Based on a patch originally by Claude Heiland-Allen default: gcc_unreachable (); } ---- a/gcc/config/i386/i386.c -+++ b/gcc/config/i386/i386.c -@@ -4981,13 +4981,13 @@ - switch (type) +--- a/gcc/config/i386/i386.cc ++++ b/gcc/config/i386/i386.cc +@@ -5418,17 +5418,15 @@ ix86_get_ssemov (rtx *operands, unsigned size, { case opcode_int: -- opcode = misaligned_p ? "vmovdqu32" : "vmovdqa32"; -+ opcode = "vmovdqu32"; + if (scalar_mode == E_HFmode) +- opcode = (misaligned_p +- ? (TARGET_AVX512BW ? "vmovdqu16" : "vmovdqu64") +- : "vmovdqa64"); ++ opcode = TARGET_AVX512BW ? "vmovdqu16" : "vmovdqu64"; + else +- opcode = misaligned_p ? "vmovdqu32" : "vmovdqa32"; ++ opcode = "vmovdqu32"; break; case opcode_float: - opcode = misaligned_p ? "vmovups" : "vmovaps"; @@ -187,9 +192,24 @@ Based on a patch originally by Claude Heiland-Allen break; } } -@@ -4996,16 +4996,16 @@ - switch (scalar_mode) +@@ -5438,29 +5436,21 @@ ix86_get_ssemov (rtx *operands, unsigned size, { + case E_HFmode: + if (evex_reg_p) +- opcode = (misaligned_p +- ? (TARGET_AVX512BW +- ? "vmovdqu16" +- : "vmovdqu64") +- : "vmovdqa64"); ++ opcode = TARGET_AVX512BW ? "vmovdqu16" : "vmovdqu64"; + else +- opcode = (misaligned_p +- ? (TARGET_AVX512BW +- ? "vmovdqu16" +- : "%vmovdqu") +- : "%vmovdqa"); ++ opcode = TARGET_AVX512BW ? "vmovdqu16" : "%vmovdqu"; + break; case E_SFmode: - opcode = misaligned_p ? "%vmovups" : "%vmovaps"; + opcode = "%vmovups"; @@ -208,7 +228,7 @@ Based on a patch originally by Claude Heiland-Allen break; default: gcc_unreachable (); -@@ -5017,48 +5017,32 @@ +@@ -5472,48 +5462,32 @@ ix86_get_ssemov (rtx *operands, unsigned size, { case E_QImode: if (evex_reg_p)