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Merge bitcoin/bitcoin#26839: Add support for RNDR/RNDRRS for AArch64 on Linux
aee5404e02e203a256c1a97b629b9b107cc8bb07 Add support for RNDR/RNDRRS for aarch64 on Linux (John Moffett)
Pull request description:
This checks whether the ARMv8.5-A optional TRNG extensions [RNDR](https://developer.arm.com/documentation/ddi0601/2022-12/AArch64-Registers/RNDR--Random-Number) and [RNDRRS](https://developer.arm.com/documentation/ddi0601/2022-12/AArch64-Registers/RNDRRS--Reseeded-Random-Number) are available and, if they are, uses them for random entropy purposes.
They are nearly functionally identical to the x86 RDRAND/RDSEED extensions and are used in a similar manner.
Currently, there [appears to be](https://marcin.juszkiewicz.com.pl/download/tables/arm-socs.html) only one actual hardware implementation -- the Amazon Graviton 3. (See the `rnd` column in the link.) However, future hardware implementations may become available.
It's not possible to directly query for the capability in userspace, but the Linux kernel [added support](1a50ec0b3b
) for querying the extension via `getauxval` in version 5.6 (in 2020), so this is limited to Linux-only for now.
Reviewers may want to launch any of the `c7g` instances from AWS to test the Graviton 3 hardware. Alternatively, QEMU emulates these opcodes for `aarch64` with CPU setting `max`.
Output from Graviton 3 hardware:
```
ubuntu@ip:~/bitcoin$ src/bitcoind -regtest
2023-01-06T20:01:48Z Bitcoin Core version v24.99.0-3670266ce89a (release build)
2023-01-06T20:01:48Z Using the 'arm_shani(1way,2way)' SHA256 implementation
2023-01-06T20:01:48Z Using RNDR and RNDRRS as additional entropy sources
2023-01-06T20:01:48Z Default data directory /home/ubuntu/.bitcoin
```
Graviton 2 (doesn't support extensions):
```
ubuntu@ip:~/bitcoin$ src/bitcoind -regtest
2023-01-06T20:05:04Z Bitcoin Core version v24.99.0-3670266ce89a (release build)
2023-01-06T20:05:04Z Using the 'arm_shani(1way,2way)' SHA256 implementation
2023-01-06T20:05:04Z Default data directory /home/ubuntu/.bitcoin
```
This partially closes #26796. As noted in that issue, OpenSSL [added support](https://github.com/openssl/openssl/pull/15361) for these extensions a little over a year ago.
ACKs for top commit:
achow101:
ACK aee5404e02e203a256c1a97b629b9b107cc8bb07
laanwj:
Tested ACK aee5404e02e203a256c1a97b629b9b107cc8bb07
Tree-SHA512: 1c1eb345d6690f5307a87e9bac8f06a0d1fdc7ca35db38fa22192510a44289a03252e4677dc7cbf731a27e6e3a9a4e42b6eb4149fe063bc1c905eb2536cdb1d3
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@ -41,6 +41,9 @@
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#ifdef HAVE_SYSCTL_ARND
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#include <sys/sysctl.h>
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#endif
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#if defined(HAVE_STRONG_GETAUXVAL) && defined(__aarch64__)
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#include <sys/auxv.h>
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#endif
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[[noreturn]] static void RandFailure()
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{
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@ -176,6 +179,62 @@ static uint64_t GetRdSeed() noexcept
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#endif
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}
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#elif defined(__aarch64__) && defined(HWCAP2_RNG)
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static bool g_rndr_supported = false;
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static void InitHardwareRand()
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{
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if (getauxval(AT_HWCAP2) & HWCAP2_RNG) {
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g_rndr_supported = true;
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}
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}
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static void ReportHardwareRand()
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{
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// This must be done in a separate function, as InitHardwareRand() may be indirectly called
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// from global constructors, before logging is initialized.
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if (g_rndr_supported) {
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LogPrintf("Using RNDR and RNDRRS as additional entropy sources\n");
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}
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}
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/** Read 64 bits of entropy using rndr.
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*
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* Must only be called when RNDR is supported.
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*/
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static uint64_t GetRNDR() noexcept
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{
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uint8_t ok;
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uint64_t r1;
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do {
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// https://developer.arm.com/documentation/ddi0601/2022-12/AArch64-Registers/RNDR--Random-Number
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__asm__ volatile("mrs %0, s3_3_c2_c4_0; cset %w1, ne;"
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: "=r"(r1), "=r"(ok)::"cc");
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if (ok) break;
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__asm__ volatile("yield");
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} while (true);
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return r1;
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}
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/** Read 64 bits of entropy using rndrrs.
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*
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* Must only be called when RNDRRS is supported.
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*/
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static uint64_t GetRNDRRS() noexcept
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{
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uint8_t ok;
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uint64_t r1;
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do {
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// https://developer.arm.com/documentation/ddi0601/2022-12/AArch64-Registers/RNDRRS--Reseeded-Random-Number
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__asm__ volatile("mrs %0, s3_3_c2_c4_1; cset %w1, ne;"
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: "=r"(r1), "=r"(ok)::"cc");
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if (ok) break;
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__asm__ volatile("yield");
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} while (true);
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return r1;
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}
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#else
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/* Access to other hardware random number generators could be added here later,
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* assuming it is sufficiently fast (in the order of a few hundred CPU cycles).
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@ -194,6 +253,12 @@ static void SeedHardwareFast(CSHA512& hasher) noexcept {
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hasher.Write((const unsigned char*)&out, sizeof(out));
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return;
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}
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#elif defined(__aarch64__) && defined(HWCAP2_RNG)
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if (g_rndr_supported) {
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uint64_t out = GetRNDR();
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hasher.Write((const unsigned char*)&out, sizeof(out));
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return;
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}
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#endif
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}
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@ -219,6 +284,14 @@ static void SeedHardwareSlow(CSHA512& hasher) noexcept {
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}
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return;
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}
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#elif defined(__aarch64__) && defined(HWCAP2_RNG)
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if (g_rndr_supported) {
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for (int i = 0; i < 4; ++i) {
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uint64_t out = GetRNDRRS();
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hasher.Write((const unsigned char*)&out, sizeof(out));
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}
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return;
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}
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#endif
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}
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