merge bitcoin#27897: use GCC 12.3.0 to build releases

This commit is contained in:
Kittywhiskers Van Gogh 2023-06-14 16:58:44 +01:00
parent a701b06435
commit 59a125a5ad
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GPG Key ID: 30CD0C065E5C4AAD
3 changed files with 47 additions and 18 deletions

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@ -74,7 +74,8 @@ mkdir -p "$VERSION_BASE"
################ ################
# Default to building for all supported HOSTs (overridable by environment) # Default to building for all supported HOSTs (overridable by environment)
export HOSTS="${HOSTS:-x86_64-linux-gnu arm-linux-gnueabihf aarch64-linux-gnu riscv64-linux-gnu powerpc64-linux-gnu powerpc64le-linux-gnu # powerpc64le-linux-gnu currently disabled due non-determinism issues across build arches.
export HOSTS="${HOSTS:-x86_64-linux-gnu arm-linux-gnueabihf aarch64-linux-gnu riscv64-linux-gnu powerpc64-linux-gnu
x86_64-w64-mingw32 x86_64-w64-mingw32
x86_64-apple-darwin arm64-apple-darwin}" x86_64-apple-darwin arm64-apple-darwin}"

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@ -94,7 +94,7 @@ chain for " target " development."))
(home-page (package-home-page xgcc)) (home-page (package-home-page xgcc))
(license (package-license xgcc))))) (license (package-license xgcc)))))
(define base-gcc gcc-10) (define base-gcc gcc-12)
(define base-linux-kernel-headers linux-libre-headers-6.1) (define base-linux-kernel-headers linux-libre-headers-6.1)
(define* (make-bitcoin-cross-toolchain target (define* (make-bitcoin-cross-toolchain target
@ -565,9 +565,6 @@ inspecting signatures in Mach-O binaries.")
automake automake
pkg-config pkg-config
bison bison
;; Native GCC 10 toolchain
gcc-toolchain-10
(list gcc-toolchain-10 "static")
;; Scripting ;; Scripting
python-minimal ;; (3.10) python-minimal ;; (3.10)
;; Git ;; Git
@ -576,14 +573,25 @@ inspecting signatures in Mach-O binaries.")
python-lief) python-lief)
(let ((target (getenv "HOST"))) (let ((target (getenv "HOST")))
(cond ((string-suffix? "-mingw32" target) (cond ((string-suffix? "-mingw32" target)
;; Windows (list ;; Native GCC 12 toolchain
(list zip gcc-toolchain-12
(list gcc-toolchain-12 "static")
zip
(make-mingw-pthreads-cross-toolchain "x86_64-w64-mingw32") (make-mingw-pthreads-cross-toolchain "x86_64-w64-mingw32")
nsis-x86_64 nsis-x86_64
nss-certs nss-certs
osslsigncode)) osslsigncode))
((string-contains target "-linux-") ((string-contains target "-linux-")
(list (make-bitcoin-cross-toolchain target))) (list ;; Native GCC 12 toolchain
gcc-toolchain-12
(list gcc-toolchain-12 "static")
(make-bitcoin-cross-toolchain target)))
((string-contains target "darwin") ((string-contains target "darwin")
(list clang-toolchain-10 binutils xorriso python-signapple)) (list ;; Native GCC 10 toolchain
gcc-toolchain-10
(list gcc-toolchain-10 "static")
binutils
clang-toolchain-10
python-signapple
xorriso))
(else '()))))) (else '())))))

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@ -168,14 +168,19 @@ Based on a patch originally by Claude Heiland-Allen <claude@mathr.co.uk>
default: default:
gcc_unreachable (); gcc_unreachable ();
} }
--- a/gcc/config/i386/i386.c --- a/gcc/config/i386/i386.cc
+++ b/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.cc
@@ -4981,13 +4981,13 @@ @@ -5418,17 +5418,15 @@ ix86_get_ssemov (rtx *operands, unsigned size,
switch (type)
{ {
case opcode_int: case opcode_int:
- opcode = misaligned_p ? "vmovdqu32" : "vmovdqa32"; if (scalar_mode == E_HFmode)
+ opcode = "vmovdqu32"; - opcode = (misaligned_p
- ? (TARGET_AVX512BW ? "vmovdqu16" : "vmovdqu64")
- : "vmovdqa64");
+ opcode = TARGET_AVX512BW ? "vmovdqu16" : "vmovdqu64";
else
- opcode = misaligned_p ? "vmovdqu32" : "vmovdqa32";
+ opcode = "vmovdqu32";
break; break;
case opcode_float: case opcode_float:
- opcode = misaligned_p ? "vmovups" : "vmovaps"; - opcode = misaligned_p ? "vmovups" : "vmovaps";
@ -187,9 +192,24 @@ Based on a patch originally by Claude Heiland-Allen <claude@mathr.co.uk>
break; break;
} }
} }
@@ -4996,16 +4996,16 @@ @@ -5438,29 +5436,21 @@ ix86_get_ssemov (rtx *operands, unsigned size,
switch (scalar_mode)
{ {
case E_HFmode:
if (evex_reg_p)
- opcode = (misaligned_p
- ? (TARGET_AVX512BW
- ? "vmovdqu16"
- : "vmovdqu64")
- : "vmovdqa64");
+ opcode = TARGET_AVX512BW ? "vmovdqu16" : "vmovdqu64";
else
- opcode = (misaligned_p
- ? (TARGET_AVX512BW
- ? "vmovdqu16"
- : "%vmovdqu")
- : "%vmovdqa");
+ opcode = TARGET_AVX512BW ? "vmovdqu16" : "%vmovdqu";
break;
case E_SFmode: case E_SFmode:
- opcode = misaligned_p ? "%vmovups" : "%vmovaps"; - opcode = misaligned_p ? "%vmovups" : "%vmovaps";
+ opcode = "%vmovups"; + opcode = "%vmovups";
@ -208,7 +228,7 @@ Based on a patch originally by Claude Heiland-Allen <claude@mathr.co.uk>
break; break;
default: default:
gcc_unreachable (); gcc_unreachable ();
@@ -5017,48 +5017,32 @@ @@ -5472,48 +5462,32 @@ ix86_get_ssemov (rtx *operands, unsigned size,
{ {
case E_QImode: case E_QImode:
if (evex_reg_p) if (evex_reg_p)