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merge bitcoin#27897: use GCC 12.3.0 to build releases
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@ -74,7 +74,8 @@ mkdir -p "$VERSION_BASE"
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################
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# Default to building for all supported HOSTs (overridable by environment)
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export HOSTS="${HOSTS:-x86_64-linux-gnu arm-linux-gnueabihf aarch64-linux-gnu riscv64-linux-gnu powerpc64-linux-gnu powerpc64le-linux-gnu
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# powerpc64le-linux-gnu currently disabled due non-determinism issues across build arches.
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export HOSTS="${HOSTS:-x86_64-linux-gnu arm-linux-gnueabihf aarch64-linux-gnu riscv64-linux-gnu powerpc64-linux-gnu
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x86_64-w64-mingw32
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x86_64-apple-darwin arm64-apple-darwin}"
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@ -94,7 +94,7 @@ chain for " target " development."))
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(home-page (package-home-page xgcc))
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(license (package-license xgcc)))))
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(define base-gcc gcc-10)
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(define base-gcc gcc-12)
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(define base-linux-kernel-headers linux-libre-headers-6.1)
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(define* (make-bitcoin-cross-toolchain target
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@ -565,9 +565,6 @@ inspecting signatures in Mach-O binaries.")
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automake
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pkg-config
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bison
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;; Native GCC 10 toolchain
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gcc-toolchain-10
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(list gcc-toolchain-10 "static")
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;; Scripting
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python-minimal ;; (3.10)
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;; Git
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@ -576,14 +573,25 @@ inspecting signatures in Mach-O binaries.")
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python-lief)
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(let ((target (getenv "HOST")))
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(cond ((string-suffix? "-mingw32" target)
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;; Windows
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(list zip
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(list ;; Native GCC 12 toolchain
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gcc-toolchain-12
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(list gcc-toolchain-12 "static")
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zip
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(make-mingw-pthreads-cross-toolchain "x86_64-w64-mingw32")
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nsis-x86_64
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nss-certs
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osslsigncode))
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((string-contains target "-linux-")
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(list (make-bitcoin-cross-toolchain target)))
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(list ;; Native GCC 12 toolchain
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gcc-toolchain-12
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(list gcc-toolchain-12 "static")
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(make-bitcoin-cross-toolchain target)))
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((string-contains target "darwin")
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(list clang-toolchain-10 binutils xorriso python-signapple))
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(list ;; Native GCC 10 toolchain
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gcc-toolchain-10
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(list gcc-toolchain-10 "static")
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binutils
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clang-toolchain-10
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python-signapple
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xorriso))
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(else '())))))
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@ -168,14 +168,19 @@ Based on a patch originally by Claude Heiland-Allen <claude@mathr.co.uk>
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default:
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gcc_unreachable ();
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}
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--- a/gcc/config/i386/i386.c
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+++ b/gcc/config/i386/i386.c
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@@ -4981,13 +4981,13 @@
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switch (type)
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--- a/gcc/config/i386/i386.cc
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+++ b/gcc/config/i386/i386.cc
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@@ -5418,17 +5418,15 @@ ix86_get_ssemov (rtx *operands, unsigned size,
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{
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case opcode_int:
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- opcode = misaligned_p ? "vmovdqu32" : "vmovdqa32";
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+ opcode = "vmovdqu32";
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if (scalar_mode == E_HFmode)
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- opcode = (misaligned_p
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- ? (TARGET_AVX512BW ? "vmovdqu16" : "vmovdqu64")
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- : "vmovdqa64");
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+ opcode = TARGET_AVX512BW ? "vmovdqu16" : "vmovdqu64";
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else
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- opcode = misaligned_p ? "vmovdqu32" : "vmovdqa32";
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+ opcode = "vmovdqu32";
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break;
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case opcode_float:
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- opcode = misaligned_p ? "vmovups" : "vmovaps";
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@ -187,9 +192,24 @@ Based on a patch originally by Claude Heiland-Allen <claude@mathr.co.uk>
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break;
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}
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}
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@@ -4996,16 +4996,16 @@
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switch (scalar_mode)
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@@ -5438,29 +5436,21 @@ ix86_get_ssemov (rtx *operands, unsigned size,
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{
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case E_HFmode:
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if (evex_reg_p)
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- opcode = (misaligned_p
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- ? (TARGET_AVX512BW
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- ? "vmovdqu16"
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- : "vmovdqu64")
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- : "vmovdqa64");
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+ opcode = TARGET_AVX512BW ? "vmovdqu16" : "vmovdqu64";
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else
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- opcode = (misaligned_p
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- ? (TARGET_AVX512BW
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- ? "vmovdqu16"
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- : "%vmovdqu")
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- : "%vmovdqa");
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+ opcode = TARGET_AVX512BW ? "vmovdqu16" : "%vmovdqu";
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break;
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case E_SFmode:
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- opcode = misaligned_p ? "%vmovups" : "%vmovaps";
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+ opcode = "%vmovups";
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@ -208,7 +228,7 @@ Based on a patch originally by Claude Heiland-Allen <claude@mathr.co.uk>
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break;
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default:
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gcc_unreachable ();
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@@ -5017,48 +5017,32 @@
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@@ -5472,48 +5462,32 @@ ix86_get_ssemov (rtx *operands, unsigned size,
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{
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case E_QImode:
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if (evex_reg_p)
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